/*
 * Copyright (c) Huawei Technologies Co., Ltd. 2025-2025. All rights reserved.
 * MemFabric_Hybrid is licensed under Mulan PSL v2.
 * You can use this software according to the terms and conditions of the Mulan PSL v2.
 * You may obtain a copy of Mulan PSL v2 at:
 *          http://license.coscl.org.cn/MulanPSL2
 * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
 * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
 * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
 * See the Mulan PSL v2 for more details.
*/
#ifndef MF_HYBRID_HYBM_PTRACER_H
#define MF_HYBRID_HYBM_PTRACER_H

#include "ptracer.h"

enum MF_HYBM_MOD {
    TP_HYBM_START = PTRACER_ID(0, 0U),
    TP_HYBM_SDMA_LH_TO_GH,
    TP_HYBM_SDMA_LH_TO_GD,
    TP_HYBM_SDMA_LD_TO_GH,
    TP_HYBM_SDMA_LD_TO_GD,

    TP_HYBM_SDMA_GH_TO_LD,
    TP_HYBM_SDMA_GH_TO_LH,
    TP_HYBM_SDMA_GD_TO_LD,
    TP_HYBM_SDMA_GD_TO_LH,

    TP_HYBM_SDMA_GH_TO_GH,
    TP_HYBM_SDMA_GH_TO_GD,
    TP_HYBM_SDMA_GD_TO_GD,
    TP_HYBM_SDMA_GD_TO_GH,

    TP_HYBM_SDMA_BATCH_GH_TO_LD,
    TP_HYBM_SDMA_BATCH_LD_TO_GH,
    TP_HYBM_SDMA_BATCH_GD_TO_LD,
    TP_HYBM_SDMA_BATCH_LD_TO_GD,
    TP_HYBM_SDMA_BATCH_LH_TO_GH,
    TP_HYBM_SDMA_BATCH_GH_TO_LH,
    TP_HYBM_SDMA_BATCH_GD_TO_LH,
    TP_HYBM_SDMA_BATCH_LH_TO_GD,
    TP_HYBM_SDMA_BATCH_GD_TO_GD,
    TP_HYBM_SDMA_BATCH_GD_TO_GH,
    TP_HYBM_SDMA_BATCH_GH_TO_GD,
    TP_HYBM_SDMA_BATCH_GH_TO_GH,
    TP_HYBM_SDMA_BATCH_G_TO_G,

    TP_HYBM_SDMA_LD_TO_GH_ASYNC,
    TP_HYBM_SDMA_GH_TO_LD_ASYNC,

    TP_HYBM_SDMA_WAIT,
    TP_HYBM_SDMA_PUT_WAIT,

    TP_HYBM_SDMA_SUBMIT_G2G_TASK,
    TP_HYBM_SDMA_G2G_SYNC,

    TP_HYBM_SDMA_G2G_HAL_QUERY_SQ_HEAD,
    TP_HYBM_SDMA_G2G_HAL_QUERY_SQ_STATUS,
    TP_HYBM_SDMA_G2G_HAL_RECEIVE_CQE,

    TP_HYBM_HOST_RDMA_LH_TO_GH,
    TP_HYBM_HOST_RDMA_LH_TO_GD,
    TP_HYBM_HOST_RDMA_LD_TO_GH,
    TP_HYBM_HOST_RDMA_LD_TO_GD,

    TP_HYBM_HOST_RDMA_BATCH_GH_TO_LD,
    TP_HYBM_HOST_RDMA_BATCH_GH_TO_LH,
    TP_HYBM_HOST_RDMA_BATCH_GD_TO_LD,
    TP_HYBM_HOST_RDMA_BATCH_GD_TO_LH,

    TP_HYBM_HOST_RDMA_BATCH_GH_TO_GH,
    TP_HYBM_HOST_RDMA_BATCH_GH_TO_GD,
    TP_HYBM_HOST_RDMA_BATCH_GD_TO_GD,
    TP_HYBM_HOST_RDMA_BATCH_GD_TO_GH,

    TP_HYBM_RDMA_LH_TO_GH,
    TP_HYBM_RDMA_LH_TO_GD,
    TP_HYBM_RDMA_LD_TO_GH,
    TP_HYBM_RDMA_LD_TO_GD,

    TP_HYBM_RDMA_GH_TO_LD,
    TP_HYBM_RDMA_GH_TO_LH,
    TP_HYBM_RDMA_GD_TO_LD,
    TP_HYBM_RDMA_GD_TO_LH,

    TP_HYBM_RDMA_GH_TO_GH,
    TP_HYBM_RDMA_GH_TO_GD,
    TP_HYBM_RDMA_GD_TO_GD,
    TP_HYBM_RDMA_GD_TO_GH,

    TP_HYBM_RDMA_BATCH_GH_TO_LD,
    TP_HYBM_RDMA_BATCH_LD_TO_GH,
    TP_HYBM_RDMA_BATCH_GD_TO_LD,
    TP_HYBM_RDMA_BATCH_LD_TO_GD,
    TP_HYBM_RDMA_BATCH_GD_TO_LH,
    TP_HYBM_RDMA_BATCH_LH_TO_GD,
    TP_HYBM_RDMA_BATCH_LH_TO_GH,
    TP_HYBM_RDMA_BATCH_GH_TO_GH,
    TP_HYBM_RDMA_BATCH_GH_TO_GD,
    TP_HYBM_RDMA_BATCH_GH_TO_LH,
    TP_HYBM_RDMA_BATCH_GD_TO_GH,
    TP_HYBM_RDMA_BATCH_GD_TO_GD,
    TP_HYBM_RDMA_BATCH_DEFAULT,
    TP_HYBM_RDMA_BATCH_WAIT_W,
    TP_HYBM_RDMA_BATCH_WAIT_R,
    TP_HYBM_DEV_RDMA_ASYNC_WRITE,
    TP_HYBM_DEV_RDMA_ASYNC_READ,
    TP_HYBM_DEV_SEND_WR,
    TP_HYBM_DEV_SUBMIT_TASK,
    TP_HYBM_RDMA_BATCH_LOCAL,

    TP_HYBM_ACL_BATCH_LD_TO_LH,
    TP_HYBM_ACL_BATCH_LH_TO_LD,
};

#endif  // MF_HYBRID_HYBM_PTRACER_H